1. Field of the Invention
The invention relates to an integrated circuit for generating a reset signal.
When the supply voltage of complex circuits, especially complex integrated circuits, is turned on, a danger exists that some circuit elements will assume an undefined state. However, undefined states generally cause malfunctions to the point of possible damage to the circuits or to electrical components connected to the circuits.
In order to enable such malfunctions to be precluded, what is known as a power-on reset circuit is often provided, which generates a usually single signal pulse (the so-called reset signal) when the supply voltage is applied, that is meant to put critical circuits or circuit elements intentionally into a defined outset state upon turn-on of the supply voltage, so as to avoid the above-mentioned disadvantages.
2. Summary of the Invention
It is accordingly an object of the invention to provide an integrated circuit for generating a reset signal when a supply voltage is applied, which overcomes the hereinafore-for generating a reset signal, comprising a terminal for a first supply potential and a terminal for a second supply potential; two first transistors connected in series between the terminals for the first and the second supply potentials, the first transistors each having a source, a drain and a gate and each having a respective one of first and second mutually complementary channel types; a serial network acting as a voltage divider circuit and being connected between the terminals for the first and the second supply potentials, the serial network including at least two second transistors each having a source, a drain and a gate and each having a respective one of the mutually complementary channel types, and the serial network including at least one element having a voltage drop during operation; the sources of the transistors of the first channel type being connected to the terminal for the first supply potential; the sources of the transistors of the second channel type being connected to the terminal for the second supply potential; the drains of the two first transistors forming a first circuit node at which a reset signal is created in operation; the gate of the second transistor of the second channel type being connected to the first circuit node; the gates of the first and second transistors of the first channel type both being connected to the drain of the second transistor of the first channel type of the serial network, forming a second circuit node; and the gate of the first transistor of the second channel type being connected to the second circuit node. mentioned disadvantages of the heretofore-known devices of this general type which reliably meets the following specifications:
the circuit should function reliably in the event of both a rapid and a slow rise in the supply voltage; PA1 it should respond even whenever the full value of the supply voltage fails to attain, or exceeds, the supply voltage limit values specified by the manufacturer of the complex circuit; PA1 in the event of voltage fluctuations in the supply voltage during operation, or in other words after the supply voltage has been applied and after the ensuing already-performed reset process, reactivation of the reset signal should be reliably prevented; and PA1 the circuit should have as few circuit elements as possible and require as little space as possible.
Moreover, the integrated circuit to be provided should be capable of acting as a component of a complex integrated circuit.
With the foregoing and other objects in view there is provided, in accordance with the invention, an integrated circuit
In accordance with another feature of the invention, the at least one element having a voltage drop during operation is at least first and second elements, and the gate of the first transistor of the second channel type is connected to at least the second element form a third circuit node and is connected through at least the second element to the second circuit node.
In accordance with a further feature of the invention, the gate of at least one of the two first transistors is coupled capacitively to the second supply potential.
In accordance with an added feature of the invention, the first circuit node is coupled capacitively to the first supply potential.
In accordance with an additional feature of the invention, at least one of the at least one element having the voltage drop in operation is an ohmic resistor.
In accordance with yet another feature of the invention, at least one of the at least one element having the voltage drop in operation is a diode.
In accordance with yet a further feature of the invention, the at least one diode is a transistor having an interconnected gate and drain.
With the objects of the invention in view, there is also provided an integrated circuit for generating reset signals, comprising a first circuit part being constructed in accordance with the integrated circuit for generating a reset signal; a second circuit part being constructed in accordance with the integrated circuit for generating a reset signal, except that the second circuit node of the second circuit part is connected to the first circuit node of the first circuit part, instead of a connection between the terminal for the first supply potential and the second circuit node through a second transistor of the first channel type; and the reset signals are created at the first circuit node of the circuits parts.
In accordance with another feature of the invention, there is provided an inverter connected between the second circuit node of the second circuit part and the first circuit node of the first circuit part.
In accordance with a further feature of the invention, the inverter is a component of the serial network of the second circuit part.
In accordance with an added feature of the invention, there is provided a further circuit part being constructed identically to the second circuit part, the second circuit node of the further circuit part being connected to the first circuit node of the second circuit part.
In accordance with an additional feature of the invention, there is provided a succession of further circuit parts being constructed identically to the second circuit part, the second circuit node of each of the further circuit parts being connected to the first circuit node of the preceding circuit part in the succession.
In accordance with yet another feature of the invention, there is provided a terminal for an analog potential to be digitalized instead of the terminal for the first supply potential of the first circuit part; a plurality of second circuit parts each including a second circuit node being connected to the first circuit node of the first circuit part; and the serial networks of the second circuit parts having voltage divider values differing from one another.
In accordance with a concomitant feature of the invention, there is provided a terminal for an analog potential to be digitalized instead of the terminal for the first supply potential of the first circuit part; a plurality of second circuit parts each including a second circuit node being connected to the first circuit node of the first circuit part; and instead of terminals for the first supply potential, terminals for reference potentials carry a different reference potential for each of the second circuit parts.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an integrated circuit for generating a reset signal, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.